TETRIS: A Novel FPGA Virtualization Framework for Fine-grained Sharing via Hierarchical Reconfiguration

Authors:
Wenbin Teng, Wenqi Lou, Teng Wang, Lei Gong, Chao Wang, Xuehai Zhou
Published:
ACM Transactions on Reconfigurable Technology and Systems, volume 19, issue 1, pp. 1-32. March 6, 2026.
Abstract:
<jats:p>Field-Programmable Gate Arrays (FPGAs) are increasingly used in cloud platforms to accelerate diverse workloads, thanks to their reconfigurability and high performance. However, in multi-tenant cloud environments, existing FPGA virtualization mechanisms fail to align with dynamic application demands due to their static partitioning methods, leading to significant internal fragmentation.</jats:p> <jats:p> To address these issues, we present <jats:sc>Tetris</jats:sc> , an FPGA virtualization framework that supports flexible and dynamic reconfigurable resource allocation to improve cloud platform deployment efficiency. Specifically, <jats:sc>Tetris</jats:sc> deploys nested dynamic reconfigurable regions on FPGAs and adopts a tree structure to manage reconfigurable resources, enabling fine-grained resource reallocation at runtime. Enabled by the proposed fat-tree-based data transmission architecture between reconfigurable regions, <jats:sc>Tetris</jats:sc> can map dataflow-based applications onto these regions effectively. Additionally, <jats:sc>Tetris</jats:sc> offers dual-level resource optimization strategies to help system to balance the resource utilization and run-time compilation overhead. </jats:p> <jats:p> We evaluate <jats:sc>Tetris</jats:sc> with dataflow HLS benchmarks. Experimental results show that <jats:sc>Tetris</jats:sc> achieves a 1.16  <jats:inline-formula content-type="math/tex"> <jats:tex-math notation="LaTeX" version="MathJax">\(\times\)</jats:tex-math> </jats:inline-formula> improvement in resource utilization compared to advanced FPGA virtualization frameworks and delivers a 1.3  <jats:inline-formula content-type="math/tex"> <jats:tex-math notation="LaTeX" version="MathJax">\(\times\)</jats:tex-math> </jats:inline-formula> increase in run-time throughput, incurring less than 30% additional compilation latency. <jats:sc>Tetris</jats:sc> enables scalable, on-demand cloud FPGA acceleration, improving adaptability across different workloads. </jats:p>
BibTeX:
@article{teng2026,
  title = {{TETRIS: A Novel FPGA Virtualization Framework for Fine-grained Sharing via Hierarchical Reconfiguration}},
  author = {Wenbin Teng and Wenqi Lou and Teng Wang and Lei Gong and Chao Wang and Xuehai Zhou},
  journal = {ACM Transactions on Reconfigurable Technology and Systems},
  volume = {19},
  issue = {1},
  year = 2026,
  month = 3,
  day = 6,
  doi = {10.1145/3779447},
}